跳转到主内容
帮助

当前版本: Dan ,

文本:

There is no one answer here:
 
* The CPU has more than one means of interconnection depending on the CPU series.
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes.
 
So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.
 
=== Update (01/04/2018) ===
 
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from these documents.
 
* [https://ark.intel.com/products/126684/Intel-Core-i7-8700K-Processor-12M-Cache-up-to-4_70-GHz|i7-8700K Processor] which offers 16 PCIe lanes
* [https://ark.intel.com/products/125903/Intel-Z370-Chipset|Z370 Chipset] which in its self offers 24 lanes
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|MSI logic board Z370-A-PRO Specs] & [https://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]
 
=== Update (01/05/2018) ===
 
George, it’s not that cut & dry! Look at this diagram
[image|1310835]
 
As you can see the CPU’s PCI lanes are dedicated for graphics boards in this design.

状态:

open

编辑: Dan ,

文本:

There is no one answer here:
 
* The CPU has more than one means of interconnection depending on the CPU series.
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes.
 
So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.
 
=== Update (01/04/2018) ===
 
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from thisthese documents.
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from thisthese documents.
 
* [https://ark.intel.com/products/126684/Intel-Core-i7-8700K-Processor-12M-Cache-up-to-4_70-GHz|i7-8700K Processor] which offers 16 PCIe lanes
* [https://ark.intel.com/products/125903/Intel-Z370-Chipset|Z370 Chipset] which in its self offers 24 lanes
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|MSI logic board Z370-A-PRO Specs] & [https://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]

状态:

open

编辑: Dan ,

文本:

There is no one answer here:
 
* The CPU has more than one means of interconnection depending on the CPU series.
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes.
 
So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.
 
=== Update (01/04/2018) ===
 
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from this documents.
 
* [https://ark.intel.com/products/126684/Intel-Core-i7-8700K-Processor-12M-Cache-up-to-4_70-GHz|i7-8700K Processor] which offers 16 PCIe lanes
* [https://ark.intel.com/products/125903/Intel-Z370-Chipset|Z370 Chipset] which in its self offers 24 lanes
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|Z370-A-PROhttps://www.msi.com/Motherboard/Z370-A-PRO/Specification|MSI logic board Z370-A-PRO Specs] & [https://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|Z370-A-PROhttps://www.msi.com/Motherboard/Z370-A-PRO/Specification|MSI logic board Z370-A-PRO Specs] & [https://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]

状态:

open

编辑: Dan ,

文本:

There is no one answer here:
 
* The CPU has more than one means of interconnection depending on the CPU series.
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes.
 
So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.
 
=== Update (01/04/2018) ===
 
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from this documents.
 
* [https://ark.intel.com/products/126684/Intel-Core-i7-8700K-Processor-12M-Cache-up-to-4_70-GHz|i7-8700K Processor] which offers 16 PCIe lanes
* [https://ark.intel.com/products/125903/Intel-Z370-Chipset|Z370 Chipset] which in its self offers 24 lanes
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|Z370-A-PRO Specs] & the [https://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|Z370-A-PRO Specs] & the [https://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]

状态:

open

编辑: Dan ,

文本:

There is no one answer here:
 
* The CPU has more than one means of interconnection depending on the CPU series.
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes.
 
So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.
 
=== Update (01/04/2018) ===
 
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from this documents.
 
* [https://ark.intel.com/products/126684/Intel-Core-i7-8700K-Processor-12M-Cache-up-to-4_70-GHz|i7-8700K Processor] which offers 16 PCIe lanes
* [https://ark.intel.com/products/125903/Intel-Z370-Chipset|Z370 Chipset] which in its self offers 24 lanes
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|https://www.msi.com/Motherboard/Z370-A-PRO/Specification|Z370-A-PRO Specs] & the [https://www.msi.com/pdf/presale/Z370-A-PRO|datahttps://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification|https://www.msi.com/Motherboard/Z370-A-PRO/Specification|Z370-A-PRO Specs] & the [https://www.msi.com/pdf/presale/Z370-A-PRO|datahttps://www.msi.com/pdf/presale/Z370-A-PRO|Z370-A-PRO data sheet]

状态:

open

编辑: Dan ,

文本:

There is no one answer here:
 
* The CPU has more than one means of interconnection depending on the CPU series.
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes.
 
So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.
 
=== Update (01/04/2018) ===
 
Lets work off of a real CPU, chip set & logic board. Review these and focus your questions from this documents.
* [https://ark.intel.com/products/126684/Intel-Core-i7-8700K-Processor-12M-Cache-up-to-4_70-GHz|i7-8700K Processor] which offers 16 PCIe lanes
* [https://ark.intel.com/products/125903/Intel-Z370-Chipset|Z370 Chipset] which in its self offers 24 lanes
* [https://www.msi.com/Motherboard/Z370-A-PRO/Specification| & the [https://www.msi.com/pdf/presale/Z370-A-PRO|data sheet]

状态:

open

原帖由: Dan ,

文本:

There is no one answer here:

* The CPU has more than one means of interconnection depending on the CPU series. 
* The CPU's connections can be directed to a PCH chip which can manage a greater number of PCI lanes. 

So between the logic board and the CPU and how they work together will set the total number of lanes and then the lanes are distributed to the different slots as well as any dedicated interfaces on the logic board.

状态:

open